Engineering Project Manager – Photonic Integrated Circuit (PIC) Fabrication

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Engineering Project Manager – Photonic Integrated Circuit (PIC) Fabrication

United States(Onsite)

If you want to work at the forefront of the AI super-cycle, Nokia is a place where you can make a tangible impact. Forget the old stereotypes — We are no longer a forgotten mobile phone manufacturer or traditional telecom. Nokia has quietly reinvented itself into a premier architect of AI infrastructure, a mission backed by Nvidia's recent $1 billion investment in our company. We are growing fast and making a big impact. While most AI news focuses heavily on GPU chips, those are only as fast as the networks connecting them. Because AI training and inference demand flawless, low-latency data transfers, advanced optical technologies have become the vital backbone of the entire AI revolution. As an established global leader in coherent optical networking and data center interconnects, Nokia is where engineers solve the actual capacity and speed bottlenecks of the AI age. Join us and help build the physical networks driving the future of AI.

Your responsibilities

We are seeking a highly motivated and detail-oriented Engineering Project Manager (EPM) to drive development and fabrication of our next-generation Photonic Integrated Circuits (PICs). In this role, you will bridge the gap between cutting-edge optoelectronic design, our new photonic chip manufacturing facility, and system integration teams. You will coordinate cross-functional efforts to deliver high-performance PICs to power the world's fastest AI data center fabrics and coherent transport networks. This is an ideal role for one looking to accelerate their career in deep-tech hardware delivery.

Key Responsibilities

· Project Execution & Lifecycle Management: Own the execution schedule, milestones, and deliverables for PIC fabrication projects.

· Cross-Functional Coordination: Facilitate daily synchronization between optical design engineers, mask layout teams, internal fabrication operations, packaging specialists, and product management.

· Tool and Process Alignment: Partner closely with internal fabrication engineering teams and dedicated processing tool owners to optimize hardware queues, schedule critical preventative maintenance, and prevent line bottlenecks during engineering runs.

· Risk & Bottleneck Management: Proactively identify critical path dependencies, technical roadblocks, processing tool constraints, and material supply risks.

· Project Reporting: Maintain clear project dashboards. Communicate technical status, resource constraints, and key metrics regularly to senior leadership and engineering stakeholders.

Your skills and experience

Required Qualifications

· Education: Bachelor’s or Master’s Degree in Engineering, Physics, Optics, Materials Science, or a related technical/science discipline.

· Experience: Minimum of 2+ years of professional experience in a hardware engineering, product development, or project management role.

· Project Management Fundamentals: Proven experience managing project timelines, organizing complex technical deliverables, and utilizing project management software (e.g., Smartsheet, Jira).

· Communication: Exceptional verbal and written communication skills, with a demonstrated ability to translate complex hardware status into structured, actionable project updates.

Preferred & Desired Attributes

· Basic understanding of semiconductor manufacturing environments, cleanroom protocols, and the operational cadence of dealing with processing tools and wafer-handling coordination.

· Analytical Thinking: Skills to analyze requirements for completeness, consistency, and feasibility.

· Familiarity with semiconductor design lifecycles, particularly tape-out processes, cleanroom assembly, testing, or packaging.

· Direct exposure to InP substrates, fabrication processes, coherent optical subsystems, or fiber-optic communications systems is a significant plus, though strong execution skills remain the primary focus.

· An agile mindset with the ability to navigate shifting priorities in a fast-paced, R&D-heavy semiconductor environment.

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Job Info

• Job CategoryApplied R&D
• Posting Date06/24/2026
• Degree LevelBachelor’s degree
• Job ScheduleFull time
• Job TypeExperienced
• Job Identification37947
• Will NSA/CAPS approval be required? (E.g., accessing a US Customer Network?)No
• Role TypeIndividual contributor
• Laptop - support with ordering neededYes
• Salary Range$119k to $220k USD * Plus, potential incentive/variable compensation for eligible roles.
• Experience levelExperienced
• Locations1322 Bordeaux Drive, Sunnyvale, California, 94089-1005, US6373 San Ignacio Avenue, San Jose, California, 95119-1200, US(Onsite)
• Regular or TemporaryRegular

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At Nokia, we want every candidate to be able to perform their best. If you need any adjustments or support during the recruitment process, please let us know. All requests are treated confidentially.

AI Statement: Nokia embraces the strategic use of Artificial Intelligence (AI) within our recruiting process to enhance the candidate experience and significantly improve our operational efficiencies. By leveraging AI-powered tools, we aim to create a more responsive and equitable journey for all applicants. Concurrently, we advocate for the intelligent, ethical, and safe use of AI by candidates and applicants when preparing and submitting their applications for our roles. This includes ensuring that any AI-generated content is thoroughly reviewed for accuracy, originality, and relevance, and that its use aligns with principles of transparency and integrity. Our goal is to foster a recruitment environment that benefits from technological advancements while upholding fairness, authenticity, and human oversight.

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