Source description
About the role
Hands-on experience in NVM embedded or NVM product design, verification and production
Hands-on experience in NVM full chip circuit simulation setup, debugging, and verification
Hands-on experience modeling circuits using Python, Verilog-A, and System Verilog Real Number Modeling
Familiar and hands-on experience some or all memory circuit block design: decoder, high voltage switches, charge pumps, HV and LV regulator, bandgap, high performance low power sense amp, monitoring, and BIST capability
Good understanding & knowledge of semiconductor device physics, and advanced process technology
Experienced in multiple generations NVM tapeout activities, layout supervision, chip planning, silicon debugging
Excellent communication skills, ability to work well across multi-functional teams
Fluent in all major CAD tools: SPICE, Cadence Virtuoso, Verilog simulation software
Some knowledge of scripting such as Python
Must be a self-starter, detail-oriented, and team player
Ph.D. or MS degree in EE or related 5-10+ years of semiconductor memory industrial experience
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