Senior Silicon Engineer

As a Senior Silicon Engineer in the data processing unit team you will be designing modules to solve complex problems in a datacenter for the DPU silicon. You will interact with the software team to co-develop programmable silicon implementation, microarchitecture and work with design verification and physical design teams on delivering a quality module. The vast breadth of domains required to build our DPU silicon gives the opportunity to experience different areas of expertise. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. This role will requires access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. BS and/or MS in Electrical Engineering or equivalent degree 8+ years of RTL Design and micro-architecture experience Design of modules in the networking silicon Experience with the development of complex modules from concept to silicon. Understanding of processors and peripheral interconnect bus protocols and architectures is a plus. Understanding of low power microarchitecture techniques. Knowledge of Verilog, System Verilog, C++, Python and Perl