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Altera

FPGA design and development · Quartus Prime synthesis and timing analysis

Ethernet IP Design Application Engineer

Bangalore · OnsitePosted 7 days ago
HardwareMid-levelFull Time
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Job Description: Altera is focused on delivering high-quality, timely, and differentiated FPGA solutions to customers. To support this mission, we are seeking an experienced Ethernet IP Design Application Engineer with strong expertise in the Networking/Ethernet domain. In this role, with Ethernet Centre of Excellence, you will serve as a key technical expert, providing proactive and reactive support to customers and internal stakeholders. You will play a critical role in enabling customer success by helping transition designs from prototype to production , resolving complex technical challenges, and influencing product quality and usability.

We value technical excellence, customer focus, integrity, and collaboration .

Key Responsibilities Lead design bring-up and validation for Ethernet IPs across speeds: 10G, 25G, 40G, 50G, 100G, 200G, 400G, and 800G , including features such as Auto-Negotiation/Link Training (AN/LT) and IEEE 1588 Precision Time Protocol (PTP)

Act as the primary technical interface for customers, supporting debugging, issue resolution, and performance optimization

Highlight Ethernet IP use models and demonstrates performance metrics

Create high-quality technical collateral , including: User guides, Reference designs, Technology demonstrations and validation tools

Collaborate closely with cross-functional teams (Design, Validation, Product Engineering, and Sales) to: Reproduce and debug customer issues

Drive resolution and root-cause analysis

Validate protocol compliance and performance

Provide actionable feedback to improve IP quality and customer experience

Qualifications

  • Minimum 5 to 7 years’ experience with Bachelor’s degree or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science , or a related field Hands-on programming experience in one or more of the following: VHDL, Verilog, C/C++, Python, Perl, or TCL

  • Job Type: Regular

  • Shift: Shift 1 (India)

  • Primary Location: Bengaluru, Karnataka, India

  • Additional Locations: Regus, Madhapur

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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